Supported SDC Constraints
    all_clocks
    all_inputs
    all_outputs
    create_clock
    create_generated_clock
    current_design
    expr
    get_cells
    get_clocks
    get_lib_cells
    get_lib_pins
    get_libs
    get_ports
    list
    set
    set_case_analysis
    set_clock_gating_check
    set_clock_latency
    set_clock_transition
    set_clock_uncertainty
    set_disable_timing
    set_drive
    set_driving_cell
    set_false_path
    set_hierarchy_separator
    set_input_delay
    set_input_transition
    set_load
    set_logic_one
    set_logic_zero
    set_max_capacitance
    set_max_delay
    set_max_time_borrow
    set_max_transition
    set_min_capacitance
    set_min_delay
    set_muticycle_path
    set_output_delay
    set_propagated_clock

Not-supported SDC Constraints
    current_instance (If you use “*” as the argument, the current_instance command can be used.)
    get_nets
    get_pins
    set_fanout_load
    set_logic_dc
    set_max_area
    set_max_fanout
    set_operating_conditions
    set_resistance
    set_wire_load_min_block_size
    set_wire_load_mode
    set_wire_load_model
    set_wire_load_selection_group
    set_port_fanout_number