ARMISS (ARM Instruction Set Simulator) is developed for ARM7/ARM9 Compatible Processor Design.
ARMISS can run the binary image file from ARM compiler for compatibility test.
ARMISS is a cycle-accurate simulator to validate accurate pipelined operation and it also can be compiled to BFM (Bus Functional Model) for a System-on-Chip design.
It saves simulation time as it is hundred times the faster than Verilog RTL Simulation.
SoftARM is Graphic User Interface based on GTK+ (The GIMP Toolkit) which is connected to ARMISS through ARMISS via IPC (Inter-Process Communication). SoftARM also can be connected to Verilog Simulator via IPC to control and monitor the simulation.